DC2N5 under development

A long while ago I started the DC2N5 development, porting most of the general purpose drivers and framework I used in DC2N2 to an LPC ARM® Cortex™-M3 micro-controller.
Today I was glad to be able to progress that work by implementing the tape dumping feature.

For the time being I am clocking the sampling timer at 25 MHz and producing 32-bit samples. Among the advantages of that combination there’s the fact that a silence can be up to 2.8 minutes about before it needs splitting across multiple raw samples. Things might change in future, e.g. I might settle for 12.5 MHz and 24-bit samples. Anyway, I will have to adapt the dc2nconv tool in order to support the combination of sampling frequency and sample width that I will choose in the end.

As the CPU is clocked at 100 MHz I might actually introduce clever new things not seen in DC2N2. Hopefully I will have the time to do so this year 🙂

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