6510 emulator

The other day I decided to review some of my code to interface Commodore serial peripherals and I thought it’d be an interesting approach to actually write a 6510 emulator in order to achieve accurate timing at my end.
After coding it for one of my embedded systems, as I often do, I wrote a testing version that runs on my PC. At that point another idea struck me: it would be easier to use this emulator to pre-calculate the amount of CPU clock cycles spent in critical code so that I can synchronize my native code to Commodore peripherals instead of running an emulator on my embedded systems.

There is a fair number of ways to compute “cycles”, including manual counting, but in an effort to dive deeper into the wonderful world of CBM I decided to use my emulator 🙂

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2 Responses to 6510 emulator

  1. Cool, I have also created a simple “emulator” of sorts – actually its an 6502 assembly code parser (with symbols) where I can quickly test out assembly routines – step through them to see if they are working correctly as well as counting cycles correctly (for example branches taking 2 or 3 cycles whether they are done or not). That way I can test different algorithms and optimizations and try to see the cycle savings I get. 🙂

    • luigidifraia says:

      Cool. My tool on the PC side is much dumber than that: It uses PRG files as input. E.g.:

      6510emulator.exe KERNAL.PRG 0xffba
      6510 Emulator v0.4 – (C) 2015 Luigi Di Fraia
      File name: KERNAL.PRG – load address: E000
      AC:00 XR:00 YR:00 SP:00 SR: 20 PC:FFBA OP:4C JMP L:0 CY:3 N:1
      AC:00 XR:00 YR:00 SP:00 SR: 20 PC:FE00 OP:85 STA L:0 CY:6 N:2
      AC:00 XR:00 YR:00 SP:00 SR: 20 PC:FE02 OP:86 STX L:0 CY:9 N:3
      AC:00 XR:00 YR:00 SP:00 SR: 20 PC:FE04 OP:84 STY L:0 CY:12 N:4
      AC:00 XR:00 YR:00 SP:00 SR: 20 PC:FE06 OP:60 RTS L:0 CY:18 N:5

      So the above tells me that calling the kernel function at $ffba consumes 18 clock cycles 🙂

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